Siddharth_Seth
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B.Tech. (Electronics & Electrical Communication Engg.), IIT Kharagpur, 2006
MSEE, Stanford University, 2008
Admitted to Ph.D. Candidacy: 2007-2008
Research:
//RF and Analog Front-ends using MEMS//
Micro-Electro-Mechanical Systems (MEMS) are now being increasingly used for on-chip frequency control and timing of micro-processors, wireless/wireline communication chips, etc. RF filters and reference oscillators implemented using Q > 100,000, vibrating, on-chip micromechanical resonators can be used as an attractive solution to the ever increasing count of bulky and costly components like SAW filters and Quartz-crystal based reference oscillators in modern-day multi-band, multi-mode wireless systems.
The integration of high-Q MEMS structures with CMOS circuits brings with it a paradigm shift in the design of corresponding key components of RF and analog front-ends. The goal of this research is to identify the advantages of such RF and analog front-ends with MEMS devices and achieve enhanced robustness and power and cost savings.
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//Noise Optimization of Amplifiers and Continuous Time Filters//<br>
The performance metrics of interest in analog circuits such as filters and amplifiers are gain, bandwidth, power consumption, total integrated noise, area, etc. Many circuit design problems are located in a very broad design space. This means that there can be multiple topologies, or multiple sets of device sizes and bias currents within a given topology, which implement, say, the same gain and bandwidth but have different power consumption, total integrated noise, and area. Within the design space, there will usually exist one optimal design that minimizes (or maximizes) one of the objectives, say power consumption, given a constraint on the other metrics, like bandwidth, area, total integrated noise, etc. For the simplest of circuits, hand analysis using closed form expressions is adequate for finding the optimal design. Examples of such circuits are differential amplifiers, single stage or two stage amplifiers, filters with order less than two, etc. For larger circuits, symbolic analyzers and/or simulators can be used to perform the automated design and optimization.
In this research, we have developed a fast, direct method of computing closed form symbolic expressions for noise integrals of arbitrary order, and combine it with closed form expressions for settling time, to perform nonlinear constrained optimization of analog circuits like three-stage nested-Miller-compensated amplifiers, and continuous time gm-C and active-RC filters.
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<br>Email: sidseth AT stanford DOT edu<br>
Homepage: http://www.stanford.edu/~sidseth/<br>
