<br>BSEE, Outstanding senior award, Summa Cum Laude with Honors, University of Arizona, 2005<br>

BSCS, Summa Cum Laude, University of Arizona, 2005

MSEE, Stanford University, 2007

Admitted to Ph.D. Candidacy: 2006-2007


//Neural Signal Acquisition and Processing//

This work explores low-power mixed-signal ASIC design for in vivo recording of neural signals in human and animal subjects. Microelectrode arrays used in neuroscience research and emerging medical applications support one hundred or more channels, each measuring neural activity at the cellular level. Signals from electrodes must be amplified and processed before being transmitted off chip, a need which has given rise to ASICs employing dense arrays of front-end acquisition channels. The design space for such electronics is tightly constrained in terms of power and area, and reliability is critical. Research in this area must mature from proof-of-concept systems to more robust and practical architectures to meet the needs of neuroscientists and patients as emerging applications move from experimental phases to human clinical trials. A 96-channel full bandwidth neural recording IC (shown below) has been designed and fabricated in 130-nm CMOS to acquire extracellular action potentials and local field potentials from electrode arrays implanted in the cerebral cortex. This IC is the cornerstone of the latest ‘Hermes’ series neural recording platforms, an ongoing experimental neuroscience initiative in Prof. Krishna Shenoy’s neural prosthetic systems laboratory, which studies the neural correlates of motor behavior in freely behaving primates. Emerging clinical applications include neural prosthetic systems which partially restore lost functionality to patients with motor impairment. <br>


R.M. Walker, H. Gao, P. Nuyujukian, K.A.A. Makinwa, K.V. Shenoy, T.H. Meng, B. Murmann, “A 96-channel full data rate direct neural interface in 0.13µm CMOS,” VLSI Circuits (VLSIC), 2011 Symposium on, pp.144-145, June 2011<br>

H. Gao, R.M. Walker, P. Nuyujukian, K.A.A. Makinwa, K.V. Shenoy, B. Murmann, and T.H. Meng, “HermesE: A 96-channel full data rate direct neural interface in 0.13µm CMOS,” IEEE Journal of Solid-State Circuits, vol. 47, no. 4, pp. 1043-1055, April 2012

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&nbsp;&nbsp; Chip.png &nbsp; &nbsp; HermesE.png&nbsp;&nbsp;&nbsp; &nbsp; Implant.png<br>


//Quantum Biomolecular Transducers for Chemical Sensing//

We explore a new biomolecular sensor platform based on gold electrodes, coated with self-assembled monolayer insulating films, placed in an electrolyte solution with target analytes.&nbsp; The flux of electronic charge crossing the electrically biased interface is limited by the radiation-less, quantum mechanical electronic transition process rather than by the continuum, thermalized, non-equilibrium dielectric polarization process.&nbsp; The quantum transition-based current is a rich new source of information about the chemical composition of a sample.&nbsp; Such “leakage currents,” long ignored through decades of focus on charge-based biosensors such as ISFETs, are the key to quantum-based chemical information transduction.<br>


C. Gupta, R.M. Walker, R. Gharpuray, M. Shulaker, Z. Zhang, M. Javanmard, R.W. Davis, B. Murmann, R.T. Howe, “Electrochemical quantum tunneling for electronic detection and characterization of biological toxins,” Micro- and Nanotechnology Sensors, Systems, and Applications, Proc. of SPIE, vol. 8373, June 2012, in press<br>



//Mixed Signal ASICs for Deep Belief Networks//

Artificial neural network algorithms fade in and out of contemporary academic research as new breakthroughs are made in the machine learning community.&nbsp; Currently, the use of large collections of neurons termed 'deep belief networks' is being explored in perceptual information processing algorithms applied to image/speech/video data.&nbsp; Algorithms based on deep belief networks perform at state-of-the-art classification accuracy for such problems, and provide flexible generative statistical modeling of high dimensional datasets.&nbsp; These large connectionist networks bear much similarity to classical neural networks, yet can be trained in a computationally efficient manner due to restrictions placed on connectivity and directionality of information flow.&nbsp; VLSI implementation of such networks may provide an efficient computational substrate enabling real-world applications of deep belief networks in platforms that have tight power and area constraints.<br>



Email: rossw AT stanford DOT edu<br>