Cadence_Program

Cadence Software at Stanford University<br>Cadence University Program Member

List of Cadence Software Available<br>o Virtuoso Platform<br> - ADE<br> - Schematic Capture<br> - Layout<br> - Layout XL<br> - Custom Placer<br> - Custom Router<br> - Chip Assembly Router<br>o MMSIM<br>o SoC Encounter<br>o Encounter Test<br>o System-In-Package<br>o Assura<br>o SPB (PCB)

Research Groups Using Cadence Tools<br>Wooley Group<br>Horowitz Group<br>Tom Lee Group<br>Simon Wong Group<br>Murmann Group<br>Ada Poon Group<br>Mitra Group <br>[https://cadwiki.stanford.edu/mediawiki/index.php/Dally_Group Dally Group]<br>[http://www.stanford.edu/~arbabian/Home/Welcome.html Arbabian Group]

Courses Using Cadence Tools<br>EE313 Digital MOS Integrated Circuits <br>EE314A RF Integrated Circuit Design <br>EE314B Advanced RF Integrated Circuit Design<br>EE371 Advanced VLSI Circuit Design <br>EE315A VLSI Signal Conditioning Circuits <br>EE315B VLSI Data Conversion Circuits

Cadence Tool Help at Stanford

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Cadence is a registered trademark of Cadence Design Systems, Inc., 2655 Seely Avenue, San Jose, CA 95134<br>

Last Modified: 08/02/2013<br>Webpage Maintained By: Man-Chia Chen (Email: manchiac AT stanford DOT edu)<br>