Differences
This shows you the differences between two versions of the page.
Both sides previous revisionPrevious revision | |||
wiki_page [2020/03/31 13:49] – reric | wiki_page [2020/04/01 11:18] (current) – reric | ||
---|---|---|---|
Line 9: | Line 9: | ||
* Virtuoso Design Environment | * Virtuoso Design Environment | ||
- | | + | |
- | | + | |
- | | + | |
* Circuit Simulation | * Circuit Simulation | ||
- | | + | |
* Physical Verification | * Physical Verification | ||
- | + | | |
- | - Quantus QRC | + | - Physical Verification System |
- | - Physical Verification System | + | |
* Design for Manufacturing | * Design for Manufacturing | ||
- | + | | |
- | - Voltus | + | |
* Signal Integrity | * Signal Integrity | ||
- | + | | |
- | - Tempus | + | |
* Digital Implementation | * Digital Implementation | ||
- | + | | |
- | - Innovus | + | - Encounter |
- | - Encounter | + | - Virtuoso Digital Implementation |
- | - Virtuoso Digital Implementation | + | |
* Test | * Test | ||
- | + | | |
- | - Modus | + | |
* Formal Verification | * Formal Verification | ||
- | + | | |
- | - Conformal | + | |
* JasperGold Formal Verification Platform | * JasperGold Formal Verification Platform | ||
* Synthesis | * Synthesis | ||
- | + | | |
- | - Genus | + | - Stratus HLS |
- | - Stratus HLS | + | |
* PCB Design and Verification | * PCB Design and Verification | ||
- | + | | |
- | - Allegero | + | |
* Incisive | * Incisive |