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wiki_page [2020/03/31 13:49] – rericwiki_page [2020/04/01 11:18] (current) – reric
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-====== Wiki_Page ======+====== Wiki Page ======
  
 **Cadence Software at Stanford University**  **Cadence Software at Stanford University** 
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   * Virtuoso Design Environment   * Virtuoso Design Environment
-    * Schematic Editor +    - Schematic Editor 
-    * Layout +    - Layout 
-    * ADE +    - ADE 
  
   * Circuit Simulation   * Circuit Simulation
-    * Spectre +    - Spectre 
  
   * Physical Verification   * Physical Verification
- +    - Quantus QRC 
-- Quantus QRC +    - Physical Verification System 
-- Physical Verification System +
  
   * Design for Manufacturing   * Design for Manufacturing
- +    - Voltus 
-- Voltus +
  
   * Signal Integrity   * Signal Integrity
- +    - Tempus 
-- Tempus +
  
   * Digital Implementation   * Digital Implementation
- +    - Innovus 
-- Innovus +    - Encounter 
-- Encounter +    - Virtuoso Digital Implementation 
-- Virtuoso Digital Implementation +
  
   * Test   * Test
- +    - Modus 
-- Modus +
  
   * Formal Verification   * Formal Verification
- +    - Conformal 
-- Conformal +
  
   * JasperGold Formal Verification Platform    * JasperGold Formal Verification Platform 
   * Synthesis   * Synthesis
- +    - Genus 
-- Genus +    - Stratus HLS 
-- Stratus HLS +
  
   * PCB Design and Verification   * PCB Design and Verification
- +    - Allegero 
-- Allegero +
  
   * Incisive    * Incisive 

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