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====== Multi-GHz Ultra-Low Jitter High-Linearity Data Converter Systems ====== | ====== Multi-GHz Ultra-Low Jitter High-Linearity Data Converter Systems ====== | ||
- | Investigating architecture and circuit solutions in both advanced CMOS and BiCMOS technologies to realize next-generation RF data converter systems with multiple tens of gigahertz bandwidth (> 20GHz), ultra-low jitter (< 40fs), and high-linearity (> 65dB). | + | Investigating architecture and circuit solutions in advanced CMOS and BiCMOS technologies to realize next-generation RF data converter systems with multiple tens of gigahertz bandwidth (> 20GHz), ultra-low jitter (< 40fs including clock generation), and high-linearity (> 65dB SFDR, |IMD< |