Murmann Mixed-Signal Group

Albert Gural

anonymous@undisclosed.example.com (Anonymous) — Fri, 03 Apr 2020 00:17:08 +0000

Albert Gural [Albert Gural's Portrait] BSEE, California Institute of Technology, 2016 MSEE, Stanford University, 2018 Email: agural (AT) stanford (DOT) edu $[hdcolor #8c1515$] Hardware-Algorithm Co-design for Emerging Machine Learning Accelerators $[/hdcolor$] Deep neural networks (DNNs) have recently seen a resurgence in popularity due to the increased availability of data and capability of compute. These modern advancements allow DNNs to tackle previously intractable real-world deci…

Aldo_PeÃ±a_Perez

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 20:16:14 +0000

Aldo_PeÃ±a_Perez [Aldo 300dpi.jpg] Short Bio Aldo Peña Perez was born in Queretaro, Mexico, in 1981. Received the B. Sc. degree on Electronics Engineering from the Technological Institute of Queretaro, Mexico, in 2004. Received the M. Sc. degree from the National Institute of Astrophysics, Optics and Electronics (INAOE), Puebla, Mexico, in 2006 and Ph. D. degree from the University of Pavia, Italy, in 2010. During his Ph.D., he was involved on development, design and testing of low-power high…

Alex_Guo

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 20:16:14 +0000

Alex_Guo [Yang Guo.JPG]
BSEE, Tsinghua University, 1996
MSEE, University of Toledo, 1998
Ph.D, Stanford University, 2014
Research: Densely Integrated Interface Circuits for Structural Health Monitoring A promising approach in aerospace Structural Health Monitoring (SHM) is embedding a large-scale piezoelectric transducer array into the aircrafts’ structure to detect defects during service. Building the interface electronics of the large-scale array in IC form is essentia…

Alex_Omid-Zohoor

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 20:16:14 +0000

Alex_Omid-Zohoor [Alex_Omid_Zohoor]
BSEE, Stanford University, 2010
MSEE, Stanford University, 2011
Admitted to Ph.D. Candidacy: 2011-2012

Towards Always-On Mobile Object Detection: Energy vs. Performance Tradeoffs for Embedded HOG Feature Extraction

Alireza_Dastgheib

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 20:16:14 +0000

Alireza_Dastgheib

BSEE, Tehran University, 2005
MSEE, Stanford University, 2007
Admitted to Ph.D. Candidacy: 2006-2007
Research: High-Precision Calibration ADCs This research demonstrates an example of leveraging DSP in the design of high-speed digital-to-analog converters (DACs). The procedure is to accurately capture the output of a DAC and use that data to identify its nonlinearity and construct a predistorter to l…

Athanasios (Thanos) Ramkaj

anonymous@undisclosed.example.com (Anonymous) — Mon, 04 Oct 2021 03:07:23 +0000

Athanasios (Thanos) Ramkaj * Ph.D. (summa cum laude) in Electrical Engineering :: KU Leuven, Leuven, Belgium (2021) * M.Sc. (cum laude) in Electrical Engineering :: TU Delft, Delft, the Netherlands (2014) * B.Sc. in Physics :: Aristotle University, Thessaloniki, Greece (2012)

anonymous@undisclosed.example.com (Anonymous) — Wed, 09 Sep 2020 20:30:39 +0000

Under construction.

Bill_Chen

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 20:16:14 +0000

Bill_Chen [Billchen profile.JPG]

BASc, University of Toronto, Canada, 2010
MS, Stanford University, 2012
Admitted to Ph.D. Candidacy: 2010-2011

Research: Digitally Assisted, High-Speed Sampling Circuits

Bongjin_Kim

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 20:16:14 +0000

Bongjin_Kim [Bkim profile.jpg] BS/MS, EE, Pohang University of Science and Technology (POSTECH), Pohang, Korea, 2004/2006 Ph.D, ECE, University of Minnesota, Minneapolis, MN, 2014 Email: bkim81 AT stanford DOT edu
Research Topic: Design of circuits and systems for wireline/wireless communications and Development of novel design methodologies

Boris Murmann

anonymous@undisclosed.example.com (Anonymous) — Tue, 01 Aug 2023 18:06:01 +0000

Boris Murmann Please visit my new homepage homepage at the University of Hawaii.

Cadence_Program

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 20:16:14 +0000

Cadence_Program Cadence Software at Stanford University
Cadence University Program Member List of Cadence Software Available
o Virtuoso Platform
- ADE
- Schematic Capture
- Layout
- Layout XL
- Custom Placer
- Custom Router
- Chip Assembly Router
o MMSIM
o SoC Encounter
o Encounter Test
o System-In-Package
o Assura
o SPB (PCB)

Chenxin Zhu

anonymous@undisclosed.example.com (Anonymous) — Wed, 01 Apr 2020 20:45:32 +0000

Chenxin Zhu Ph.D, Chinese Academy of Sciences, Institute of Microelectronics, with Prof. Ming Liu, 2012 Email: cxzhu AT stanford DOT edu Wearable Smart Sensor System Wearable electronics has drawn remarkable research interest for potential applications in wearable physiological monitoring and diagnosing [1], electronic skins for prosthesis and soft robotics [2], and human-machine interfaces [3].

Chris_Young

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 20:16:14 +0000

Chris_Young B.S, Electrical Engineering; B.A, Economics, The University of Texas at Austin, 2010 M.S, Electrical Engineering, Stanford University, 2012
Admitted to Ph.D. Candidacy: 2013
Research: CMOS Image Sensor Design for Low Power Object Detection

Daniel Villamizar

anonymous@undisclosed.example.com (Anonymous) — Fri, 03 Apr 2020 00:10:03 +0000

Daniel Villamizar [Dan V Thumb.jpg] Research Interests: Low-power circuit design, machine-human interface systems, machine learning hardware acceleration, sensor systems, analog analytics Email: danvilla AT stanford DOT edu One of the key enablers of the Internet of Everything (IoE) will be the ability of systems to interface with many sensors while minimizing power consumption and data payloads.

Danny_Bankman

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 20:16:14 +0000

Danny_Bankman [Bankman.png] S.B., EE, Massachusetts Institute of Technology, 2012
M.S., EE, Stanford University, 2015
Ph.D., EE, Stanford University, 2019
Email: dbankman AT stanford DOT edu
In January 2020, I will join the Department of Electrical and Computer Engineering at Carnegie Mellon University as an Assistant Professor.

Dante Muratore

anonymous@undisclosed.example.com (Anonymous) — Wed, 01 Apr 2020 23:05:24 +0000

Dante Muratore [Dante Muratore.jpg] BS/MS, EE, Politecnico di Torino, Italy Ph.D., EE, University of Pavia, Italy Email: dantemur AT stanford DOT edu Linkedin: $[hdcolor $\#993300$\$] __Instrumenting the Nervous System at Single-Cell Resolution.__ $[/hdcolor$]

Donghyun_Kim

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 20:16:14 +0000

Donghyun_Kim BSEE, Seoul National University, 2000
MSEE, Stanford University, 2004
Admitted to Ph.D. Candidacy: 2005-2006 Research: Digital Compensation of Distortion in Continuous Time Sigma-Delta ADCs Continuous time (CT) sigma-delta ADCs have evolved as a promising, more power efficient alternative to their switched capacitor counterparts. Nevertheless, CT sigma-delta ADCs still rely on precisely linear analog integrators; this tends to lower bound the achievable power dissipation…

Douglas_Adams

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 20:16:14 +0000

Douglas_Adams [Doug.jpg]
BSEE, Massachusetts Institute of Technology, 2009
BSM, Massachusetts Institute of Technology, 2009
MEng, Massachusetts Institute of Technology, 2010
Admitted to Ph.D. Candidacy: 2010-2011 Research: Developing an RF Front-End for Sub-Nyquist Radio

Drew_Hall

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 20:16:14 +0000

Drew_Hall
Admitted to Ph.D. Candidacy: 2007-2008 Research: Biosensor Arrays for “Lab on a Chip” Diagnostics Magnetic biosensors are under active development and may soon rival established biological detection methods that currently use fluorescent labels. Giant magnetoresistive spin-valve (GMR SV) biosensors operate on a quantum mechanical effect, spin dependent scattering, to detect the presence of biomarkers labeled with magnetic nanotags (Fig. 1). As a result of changing from an opt…

Elaina Chai

anonymous@undisclosed.example.com (Anonymous) — Fri, 03 Apr 2020 00:08:01 +0000

Elaina Chai [Echai portrait.JPG] BS, Double Major in EE and Physics, Massachusetts Institute of Technology, 2012 MSEE, Massachusetts Institute of Technology, 2014 Admitted to Ph.D. Candidacy: 2014-2015 Email: echai AT stanford DOT edu Research Interests: Deep Neural Network Hardware Acceleration on FPGA's, LSTM Networks, Low energy optimizations, Information Theory/Source Coding

Gift Nyikayaramba

anonymous@undisclosed.example.com (Anonymous) — Thu, 07 May 2020 19:32:20 +0000

Gift Nyikayaramba [Nyikayaramba.jpg] BS, Electrical and Computer Engineering, Duke University 2015 MS, Electrical Engineering, Stanford University 2018 Admitted to Ph.D. Candidacy: 2016 Email: giftn@stanford.edu Research: Low-power integrated interface circuits for structural health monitoring

Guénolé Lallement

anonymous@undisclosed.example.com (Anonymous) — Fri, 26 Jun 2020 21:22:31 +0000

Guénolé Lallement * Doctor of Philosophy (Ph.D.), Aix-Marseille Université, Electrical Engineering (2019) * Master of Science (MSc.), Imperial College London, Electrical Engineering (2015) * Master of Science (Dipl. Ing.), Télécom Paris, Electrical and Computer Engineering (2015)

Hussein_Adel

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 20:16:14 +0000

Hussein_Adel

Hussein_Ali

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 20:16:14 +0000

Hussein_Ali [MeSU.png]

SHORT BIO
---------- received the B.Sc. and M.Sc. degrees from Ain Shams University, Cairo, Egypt in 2006 and 2010 respectively, and the PH.D. degree from Universite Pierre et Marie Curie, Sorbonne Universites, Paris, France in 2013, all in electrical engineering. From 2006 to 2009, he was an analog design engineer in Si-Ware Systems. From 2009, …

Ilina_Mitra

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 20:16:14 +0000

Ilina_Mitra [Ilina Mitra.jpg]
BSEE, Princeton University, 2012
Research: Automated Layout Generation of Circuit Schematics Email: ilinam AT stanford DOT edu

As transistors become smaller and circuit designs become more complex, parasitics play an increasing role in circuit design. Circuit designers find that parastic behavior due to the physical layout of their designs has a large enough impact on performance that they must adjust their designs accordin…

Ioulia_Tzouvadaki

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 20:16:14 +0000

Ioulia_Tzouvadaki PhD, Microsystems and Microelectronics, École Polytechnique Fédérale de Lausanne (EPFL), 2017 MS, Microsystems and Nanodevices, National Technical University of Athens (NTUA), 2012 BS, Physics, National and Kapodistrian University of Athens (UOA), 2010

Jonas_Messner

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 20:16:14 +0000

Jonas_Messner [MessnerJ.png] MS, Power and Microelectronics, Reutlingen University, Germany, 2018 BE, Electrical Engineering, Cooperative State University Stuttgart, Germany, 2015 Email: messnerj AT stanford DOT edu

Jonathon_Spaulding

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 20:16:14 +0000

Jonathon_Spaulding
BSEE, Massachusetts Institute of Technology, 2009 MSEE, Massachusetts Institute of Technology, 2010 Admitted to Ph.D. Candidacy: 2010-2011
Research: Low Power Integrated Analog Front Ends for Portable Ultrasound Imaging
My research focuses on designing low-power systems for portable medical applications. Specifically, my work focuses on leveraging known signal properties of ultrasonic transducers to lower the sampling (and data processing …

Kevin_Zheng

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 20:16:14 +0000

Kevin_Zheng [KevinZheng.jpg]

BSEE, Massachusetts Institute of Technology, 2012 MSEE, Massachusetts Institute of Technology, 2013 Email: kevzheng@stanford.edu Research: Power Efficient Allocation of Analog Pre-filtering and Quantization in ADC Based High Speed Links

Lita_Yang

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 20:16:14 +0000

Lita_Yang [LitaYang.jpg] BSEE, California Institute of Technology, 2012
MSEE, Stanford University, 2015 Admitted to Ph.D. Candidacy: 2013-2014 Email: yanglita AT stanford DOT edu
LinkedIn: https://www.linkedin.com/in/yanglita Research: Energy-Efficient, Approximate Memory for Machine Learning Hardware Accelerators

Luke Sammarone

anonymous@undisclosed.example.com (Anonymous) — Mon, 13 Mar 2023 17:56:05 +0000

Luke Sammarone BS, Electrical Engineering and Computer Science :: UC Berkeley (2017) Email: lsammarone AT stanford DOT edu LinkedIn Physical Unclonable Functions Physical unclonable functions (PUFs) for low-cost, secure authentication.

Luke Upton

anonymous@undisclosed.example.com (Anonymous) — Tue, 22 Feb 2022 21:32:37 +0000

Luke Upton BSEE (2018), Purdue University - Main Campus MSEE (2020), Stanford University Email: lupton AT stanford DOT edu Fully-Integrated Multiple Bits per Cell RRAM Readout circuit design for fully-integrated multiple bit per cell RRAM macros and RRAM-based dot product engines.

Mahmoud_Saadat

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 20:16:14 +0000

Mahmoud_Saadat [Mahmoud] BSEE, Sharif University of Technology, 2007
MSEE, Stanford University, 2009
Admitted to Ph.D. Candidacy: 2011-2012 Research Project: An Energy-Harvesting, Power-Aware Sensor Platform for Wireless Data Acquisition Applications

Main Page

anonymous@undisclosed.example.com (Anonymous) — Wed, 17 Aug 2022 20:26:58 +0000

Main Page Murmann Mixed-Signal Group Our group’s research is focused on innovation at the analog-to-digital interface and its computational back-end. Our work spans signal conditioning circuits for sensors, high-speed wireline and RF transceivers, as well system-driven circuit design for data-compressive interfaces and embedded machine learning.

Man-Chia_Chen

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 20:16:14 +0000

Man-Chia_Chen [Man-chia.JPG] BESS, Electical Engineering, National Chiao-Tung University, 2008
M.S, Electrical Engineering, Stanford University, 2011
Admitted to Ph.D. Candidacy: 2010-2011

Research: Front-end Electronics for Medical Ultrasound Imaging

Martin_Johannes_KrÃ¤mer

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 20:16:14 +0000

Martin_Johannes_KrÃ¤mer [Martin Kraemer.JPG] Dipl.-Ing., TU Kaiserslautern, 2009
MSEE, Stanford University, 2011
Admitted to Ph.D. Candidacy: 2010 - 2011
Research: High-resolution SAR ADC using a source follower input buffer
Successive approximation register analog-to-digital converters (SAR ADCs) have moved to the center of research on low-power ADCs in the past several years, especially for low to moderate resolutions. This project focuses on extending the performance spa…

anonymous@undisclosed.example.com (Anonymous) — Tue, 05 May 2020 16:17:25 +0000

BS in Physics, 2016, University of Trento, Italy MS in Nanotechnologies, 2018, EPFL, Switzerland Email: mgiordan@stanford.edu Google Scholar LinkedIn

Moonhyung Jang

anonymous@undisclosed.example.com (Anonymous) — Fri, 18 Nov 2022 19:01:44 +0000

Moonhyung Jang Ph.D. in Electrical and Electronic Engineering, Yonsei University, Seoul, South Korea (2021) M.Sc. in Electrical and Electronic Engineering, Yonsei University, Seoul, South Korea (2018) B.Sc. in Electrical and Electronic Engineering (summa cum laude),

anonymous@undisclosed.example.com (Anonymous) — Fri, 03 Apr 2020 01:40:19 +0000

* Main Page * People * Publications * Resources * Sponsors * Visit Us

Nick Vitale

anonymous@undisclosed.example.com (Anonymous) — Mon, 13 Apr 2020 20:14:32 +0000

Nick Vitale BS, Electrical Engineering :: Case Western Reserve University, 2017 MS, Electrical Engineering :: Case Western Reserve University, 2019 Email :: nhvitale(AT)stanford(DOT)edu

Nikolaus_Hammler

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 20:16:14 +0000

Nikolaus_Hammler [Niki.jpg]

Research interests: Low-rate sampling, low-rate system identification, digital predistortion
Email: nhammler AT stanford DOT edu
Sub-Nyquist Observation Path for Digital Predistortion of RF Power Amplifiers in Future Wireless Technologies

Nishit_Harshad_Shah

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 20:16:14 +0000

Nishit_Harshad_Shah [Nishit.JPG]

Research: Energy Harvesting for CMOS Imagers
Email: nishits AT stanford DOT edu

With a swarm of portable devices being deployed ubiquitously, there is an emerging need to power these devices without the aid of bulky batteries and long copper cables. Energy harvesting from various alternative sources can dramatically reduce the size and improve the life of the battery.

Noam_Dolev

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 20:16:14 +0000

Noam_Dolev [Noam.jpg] BSEE, Technion, Israel Institute Of Technology, 1996
MSEE, Technion, Israel Institute Of Technology, 2002
Admitted to Ph.D. Candidacy: 2007-2008
Research:High-Performance Pipeline ADCs in End-of-Roadmap Technology The focus of this research is to investigate new ways to build efficient, high performance pipeline ADCs in sub-100nm technology. One of the key steps of this work is to find a way to achieve residue amplification using low power, generating low …

Oscar Mattia

anonymous@undisclosed.example.com (Anonymous) — Wed, 01 Apr 2020 23:19:47 +0000

Oscar Mattia 2013 - 2014, M.Sc. Microelectronics, UFRGS, Brazil 2014 - 2019, Ph.D. EE, VUB / imec, Belgium Email: omattia at stanford dot edu LinkedIn: https://www.linkedin.com/in/oscar-mattia-7170b834/

Pedram_Lajevardi

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 20:16:14 +0000

Pedram_Lajevardi BASc, University of British Columbia, 2004
MSEE, Stanford University, 2006
Admitted to Ph.D. Candidacy: 2005-2006 Research: Dynamic Offset Cancellation of Inertial Sensors Today’s inertial sensors suffer from input offsets that drift over time, and nonlinearly change with temperature. The focus of this research is to cancel sensor offset due to bond-wire capacitance mismatch in a MEMS accelerometer, as a particular case. A new technique has been studied that measu…

People

anonymous@undisclosed.example.com (Anonymous) — Fri, 08 Dec 2023 01:49:21 +0000

People Faculty Boris Murmann Postdocs Moonhyung Jang Graduate Students Interface Circuits Nick Vitale Machine Learning Circuits and Systems Luke Upton Pumiao Yan Rohan Doshi Hardware Security Luke Sammarone Adjunct Faculty and Visitors Sim Narasimha, Adjunct Professor Alumni Massimo Giordano, PhD, December 2023 LinkedIn

Pietro Caragiulo

anonymous@undisclosed.example.com (Anonymous) — Wed, 01 Apr 2020 23:19:35 +0000

Pietro Caragiulo [Pic-pc.png] MS, Electrical Engineering - major Circuits, Politecnico di Bari, 2010. BS, Electrical Engineering, Politecnico di Bari, 2007. e-mail: pietroc AT stanford DOT edu Research Focus Pushing the envelope on RF-DACs performance.

Po-Hsuan Wei

anonymous@undisclosed.example.com (Anonymous) — Wed, 04 Nov 2020 20:53:10 +0000

Po-Hsuan Wei [Headshot_PHW.jpg] BSEE: National Taiwan University, 2012-2013 MSEE: Stanford University, 2015-2016 Ph.D. Candidacy: 2014-2015 Email: pohsuan AT stanford DOT edu LinkedIn: Automated Layout Generation for Analog Circuits Layout is the Bottleneck of Analog and Mixed-Signal (AMS) Designs

Publications

anonymous@undisclosed.example.com (Anonymous) — Sun, 31 Dec 2023 18:15:16 +0000

Publications Google Scholar Profile ORCID Profile 2023 * M. Jang, M. Hays, W.-H. Yu, C. Lee, P. Caragiulo, A. Ramkaj, P. Wang, A.J. Phillips, N. Vitale, P. Tandon, P. Yan, P.-I. Mak, Y. Chae, E.J. Chichilnisky, B. Murmann, D.G. Muratore, “A 1024-Channel 268 nW/pixel 36×36 um2/channel Data-Compressive Neural Recording IC for High-Bandwidth Brain-Computer Interfaces,

Pumiao Yan

anonymous@undisclosed.example.com (Anonymous) — Fri, 03 Apr 2020 00:25:19 +0000

Pumiao Yan [Pumiaoy.jpg] BS, Electrical and Computer Engineering, Cornell University, 2018 Email: pumiaoy AT stanford DOT edu

Qianyun (Savy) Lu

anonymous@undisclosed.example.com (Anonymous) — Tue, 08 Mar 2022 05:43:28 +0000

Qianyun (Savy) Lu [QianyunLu_Portrait] BS, 2016, Southeast University, Nanjing, China MS, 2019, Southeast University, Nanjing, China Email: savylu (AT) stanford (DOT) edu Google Scholar ORCID Publons Twitter LinkedIn $[hdcolor #04838c$] tinymL $[/hdcolor$] Ultra low power ML applications for IoT devices.

Ray_Nguyen

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 20:16:14 +0000

Ray_Nguyen
BSEE, University of Texas at Austin, 2006
MSEE, Stanford University, 2008
Admitted to Ph.D. Candidacy: 2007-2008
Research: High Speed Low Power A/D Converters for Nano-Scale CMOS Technology
High speed multi-gigahertz microprocessors are becoming ubiquitous in everyday applications. To push the CPU’s performance and speed to the limits, the need for massively parallel operations and serial I/O has become crucial. As a result, massive interleavin…

Resources

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 20:43:17 +0000

Resources Getting Started in the Murmann Group A tutorial in the CADwiki for getting started in the Murmann Group. CADwiki Use the CADwiki for sharing CAD knowledge with others in Stanford EE. LABwiki Use the LABwiki for info about EE lab facilities. Data Conversion Knowledge Resource by Analog Devices

Richelle_Smith

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 20:16:14 +0000

Richelle_Smith (Illustration/Diana Molleda, Photo/Julie Phaneuf) BS, Electrical Engineering, University of Southern California, 2017. Email: smithrl AT stanford DOT edu

anonymous@undisclosed.example.com (Anonymous) — Thu, 16 Jul 2020 20:57:54 +0000

BS in Electrical Engineering, 2019, California Institute of Technology Email: rdoshi96@stanford.edu

Ross_Walker

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 20:16:14 +0000

Ross_Walker [Rossw.jpg]
BSEE, Outstanding senior award, Summa Cum Laude with Honors, University of Arizona, 2005
BSCS, Summa Cum Laude, University of Arizona, 2005 MSEE, Stanford University, 2007 Admitted to Ph.D. Candidacy: 2006-2007
//Neural Signal Acquisition and Processing//

Ryan_Boesch

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 20:16:14 +0000

Ryan_Boesch
BSEE, Iowa State University, 2008
MSEE, Iowa State University, 2009
Admitted to Ph.D. Candidacy: 2009-2010 Research: High Speed Analog Filters and Equalizers
As high-speed links push for higher and higher throughputs, the increasing baud rate and signal bandwidth make it challenging and costly to equalize entirely in digital domain. Because of this fact there are now opportunities to perform some of the equalization in the energy efficient analog domain. Recent …

Scott_Blankenberg

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 20:16:14 +0000

Scott_Blankenberg Under construction.

Sean_Fischer

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 20:16:14 +0000

Sean_Fischer [ID Photo.JPG]

BSEE, University of Connecticut, 2013 MSEE, Stanford University, 2015 Ph.D. Candidacy, Stanford University, 2015 - present Email: seanrf AT stanford DOT edu

Shridevi_Muthkhod

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 20:16:14 +0000

Shridevi_Muthkhod Under construction.

Shridevi_Muthkod

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 20:16:14 +0000

Shridevi_Muthkod Under construction.

Siddharth_Seth

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 20:16:14 +0000

Siddharth_Seth
B.Tech. (Electronics & Electrical Communication Engg.), IIT Kharagpur, 2006 MSEE, Stanford University, 2008 Admitted to Ph.D. Candidacy: 2007-2008 Research: //RF and Analog Front-ends using MEMS// Micro-Electro-Mechanical Systems (MEMS) are now being increasingly used for on-chip frequency control and timing of micro-processors, wireless/wireline communication chips, etc. RF filters and reference oscillators implemented using Q > 100,000, vibrating, on-chip …

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 20:33:55 +0000

* Main Page * People * Publications * Resources * Sponsors * Visit Us

Si_(Bill)_Chen

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 20:16:14 +0000

Si_(Bill)_Chen #REDIRECT Bill_Chen

Murmann Mixed-Signal Group

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 19:39:15 +0000

Murmann Mixed-Signal Group Our group’s research is focused on innovation at the analog-to-digital interface and its computational back-end. Our work spans signal conditioning circuits for sensors, high-speed wireline & RF transceivers, as well system-driven circuit design for data-compressive interfaces and embedded machine learning.

Stephen Weinreich

anonymous@undisclosed.example.com (Anonymous) — Wed, 01 Apr 2020 23:25:14 +0000

Stephen Weinreich MS, Electrical Engineering, Stanford University, 2016 BS, Electrical Engineering, Brown University, 2014 Email: weinreich AT stanford DOT edu **An adaptive NB-IoT antenna interface using frequency-translated baseband impedances**

Ulrike_Kraft

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 20:16:14 +0000

Ulrike_Kraft [thumb]

Ph.D: 2015 in Chemistry at the Max Planck Institute for Solid State Research, Organic Electronics Research Group in Stuttgart, Germany (Dr. Hagen Klauk) and at the TU Bergakademie Freiberg, Germany (Prof. Edwin Weber)

Vaibhav_Tripathi

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 20:16:14 +0000

Vaibhav_Tripathi [Vaibhav.jpg] B.Tech, Electrical Engineering, Indian Institute of Technology, Kanpur, 2006
M.S, Electrical Engineering, Stanford University, 2009
Admitted to Ph.D. Candidacy: 2008-2009
Email: vaibhavt AT stanford DOT edu
Research: High speed and high resolution SAR ADC’s

Valerie_Barry

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 20:16:14 +0000

Valerie_Barry [P8050001 (2).jpg]

BSEE University of Idaho, May 2012
Email: vbarry AT stanford DOT edu
Research My current research is focused on the design of front-end electronics for radiation detectors and is carried out at the RED Integrated Circuits Department of the SLAC National Accelerator Laboratory. SLAC has been designing state-of-the-art detectors for particle physics, astrophysics a…

Visit Us

anonymous@undisclosed.example.com (Anonymous) — Wed, 01 Apr 2020 20:06:16 +0000

Visit Us Our Building Paul G. Allen Building (two-story building, with an arch at the entrance) 420 Via Palou, Stanford University, Stanford, CA 94305 After entering through the doors under the arch, you will see the conference room, Allen 101 on the right. Walk left to get to the small conference room, Allen 125.

Vladimir Kesler

anonymous@undisclosed.example.com (Anonymous) — Wed, 01 Apr 2020 23:40:21 +0000

Vladimir Kesler BEng, McGill University, 2016 MSEE, Stanford University, 2018 Email: vkesler@stanford.edu CMOS-Integrated, Aptamer-based Bioelectronic Point-of-Care Diagnostics Modern medical assays, used to determine biomolecular concentrations in patient samples, represent a powerful advance in patient care and diagnosis. However, these diagnostics remain limited by cost and accessibility. Most of these assays require multiple sample preparation steps conducted by trained personnel in…

Wiki Page

anonymous@undisclosed.example.com (Anonymous) — Wed, 01 Apr 2020 18:18:04 +0000

Wiki Page Cadence Software at Stanford University Cadence University Program Member List of Cadence Software Available * Virtuoso Design Environment * Schematic Editor * Layout * ADE * Circuit Simulation * Spectre * Physical Verification

Yoonyoung_Chung

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 20:16:14 +0000

Yoonyoung_Chung BSEE, POSTECH, 2006
MSEE, Stanford University, 2008
Admitted to Ph.D. Candidacy: 2007-2008
Research: Organic Transistors for Flexibe Electronics: fabrication and device physics Organic transistors have shown promising potentials in flexible electronics. Because the transistors can be directly fabricated on flexible plastic substrates at low temperatures less than 100 °C, researchers envision development of novel electronic applications, such as flexible displays, fle…

Yu_Liu

anonymous@undisclosed.example.com (Anonymous) — Tue, 31 Mar 2020 20:16:14 +0000

Yu_Liu Research: Design methodology for analog/digital mixed-signal LSI Email: lyjp AT stanford DOT edu